{"id":10,"date":"2017-03-22T15:44:58","date_gmt":"2017-03-22T13:44:58","guid":{"rendered":"http:\/\/blog.aku.edu.tr\/ismailkoyuncu\/ders-notlari\/"},"modified":"2017-03-22T15:44:58","modified_gmt":"2017-03-22T13:44:58","slug":"ders-notlari","status":"publish","type":"page","link":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/ders-notlari\/","title":{"rendered":"Ders Notlar\u0131"},"content":{"rendered":"<p>\t\t\t\t1-) Say\u0131sal Tasar\u0131m:<\/p>\n<p>Xilinx ISE Nas\u0131l Kurulur?<\/p>\n<p><a href=\"https:\/\/yadi.sk\/i\/aMbj2l1r3PzaUW\">ise_setup_tutorial<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Half Adder-Full Adder Circuits in VHDL\/Yar\u0131m ve Tam Toplay\u0131c\u0131 Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/tAPyuV7m3QE3Ls\">Half Adder in VHDL on FPGA\/FPGA-tabanl\u0131 Yar\u0131m Toplay\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/yTVXFkzT3QE3Rk\">Full Adder in VHDL on FPGA\/FPGA-tabanl\u0131 Tam Toplay\u0131c\u0131<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Adder Circuits in VHDL\/Toplay\u0131c\u0131 Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/hj96ihlU3PVUvk\">4-bit Adder in VHDL on FPGA \/FPGA-tabanl\u0131 4-bit Toplay\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/7jOMQjKe3PVWqR\">Adder_n-bit_generic in VHDL on FPGA<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Counter Circuits in VHDL\/Say\u0131c\u0131 Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/Afkpwi3J3PVWvx\">Down_counter_4-bit in VHDL on FPGA\/FPGA-tabanl\u0131 A\u015fa\u011f\u0131 Say\u0131c\u0131_4-bit<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/ObAiXX9p3PVYVQ\">Up_counter_2-bit in VHDL\u00a0on FPGA\/FPGA-tabanl\u0131 2-bit Yukar\u0131 Say\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/oBVPgq9d3PVYbU\">Up_down_counter_8-bit in VHDL on FPGA\/FPGA-tabanl\u0131 8-bit Yukar\u0131 A\u015fa\u011f\u0131 Say\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/I28RFGDp3PVYiG\">Up_down_counter_n-bit_generic in VHDL on FPGA\/FPGA-tabanl\u0131 n-bit Yukar\u0131\/A\u015fa\u011f\u0131 Say\u0131c\u0131<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Multiplexer Circuits in VHDL\/Veri Se\u00e7ici Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/pnDlYC3H3PVX3h\">Multiplexer_4X1 in VHDL\u00a0on FPGA\/FPGA-tabanl\u0131 4X1 Veri_Secici<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Multiplier Circuits in VHDL\/\u00c7arp\u0131c\u0131 Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/imdc8vPi3PVXde\">Multiplier_5-bit in VHDL on FPGA\/FPGA-tabanl\u0131 5-bit \u00c7arp\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/MmgjAnc-3PVXqY\">Multiplier_n-bit in VHDL on FPGA\/FPGA-tabanl\u0131 n-bit \u00c7arp\u0131c\u0131<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Register Circuits in VHDL\/Kaydedici Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/1Gh6cXq13PVXtH\">Register_1-bit in VHDL on FPGA\/FPGA-tabanl\u0131 1-bit Kaydedici<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/3-sTA18_3PVY2K\">Register_4-bit in VHDL on FPGA\/FPGA-tabanl\u0131 4-bit Kaydedici<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/bf5yWcys3PVY88\">Register_n-bit_generic in VHDL on FPGA\/FPGA-tabanl\u0131 n-bit Kaydedici<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Subtractor Circuits in VHDL\/\u00c7\u0131kar\u0131c\u0131 Devreleri<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/B2BYOlru3PVYEr\">Subtractor_10-bit in VHDL on FPGA\/FPGA-tabanl\u0131 10-bit \u00c7\u0131kar\u0131c\u0131<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/bo6MI5Uo3PVYQB\">Subtractor_n-bit_generic in VHDL on FPGA\/FPGA-tabanl\u0131 n-bit \u00c7\u0131kar\u0131c\u0131<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>Di\u011fer Devreler<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/qBuSjecd3QhxdQ\">Floating Point Number \u00d6rnek Devre Modeli_1<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/Hfqwtx0Q3QhyQV\">Floating Point Number \u00d6rnek Devre Modeli_2<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/I5Fj9K8p3QhyS9\">Floating Point Number \u00d6rnek Devre Modeli_3<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/AYsiA6Mk3QhyTY\">Floating Point Number \u00d6rnek Devre Modeli_4<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/Qk4UQVLT3QhyUx\">Floating Point Number \u00d6rnek Devre Modeli_5<\/a><\/p>\n<p>2-)Elektrik Devre Temelleri:<\/p>\n<p>Kaynak-1:<\/p>\n<p>Fundamentals_Of_Electric_Circuits-5th-Edition (\u0130lgili d\u00f6k\u00fcman\u0131 indirip ad\u0131n\u0131n sonundaki &#8220;.txt&#8221; yaz\u0131s\u0131n\u0131 silerek pdf program\u0131 ile a\u00e7\u0131n\u0131z.)<\/p>\n<p><a href=\"http:\/\/bank.engzenon.com\/download\/54d9982d-b904-4b3e-8c06-79f7c0feb99b\/Fundamentals_Of_Electric_Circuits-5th-Edition.pdf\">http:\/\/bank.engzenon.com\/download\/54d9982d-b904-4b3e-8c06-79f7c0feb99b\/Fundamentals_Of_Electric_Circuits-5th-Edition.pdf<\/a><\/p>\n<p>Kaynak-2:<\/p>\n<p><a href=\"http:\/\/ehm.kocaeli.edu.tr\/dersnotlari_data\/?dir=kgullu\/Elektrik%20Devre%20Temelleri\">http:\/\/ehm.kocaeli.edu.tr\/dersnotlari_data\/?dir=kgullu\/Elektrik%20Devre%20Temelleri<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/of-1Mpfy3STRUv\">EDT Deney F\u00f6yleri<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/xH-tE9hV3STbB7\">EDT Lab. \u0130\u00e7in Gerekli Malzemeler<\/a><\/p>\n<p>&nbsp;<\/p>\n<p>3-)Say\u0131sal Elektronik:<\/p>\n<p><a href=\"https:\/\/yadi.sk\/d\/HB5GWlWZ3STRxo\">Say\u0131sal Elektronik Deney F\u00f6yleri<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/i\/2Z6wiwHD3TCAXY\">Say\u0131sal Elektronik Lab. Malzemeleri<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/i\/ose0kXkd3WNffe\">Flip-Flop<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/i\/H-XgHw6b3WhA45\">01_say\u0131sal_elektronik_not_1\u00f6<\/a><\/p>\n<p><a href=\"https:\/\/yadi.sk\/i\/Avc40HtY3WhAAv\">02_say\u0131sal_elektronik_not_2\u00f6<\/a>\t\t<\/p>\n","protected":false},"excerpt":{"rendered":"<p>1-) Say\u0131sal Tasar\u0131m: Xilinx ISE Nas\u0131l Kurulur? ise_setup_tutorial &nbsp; Half Adder-Full Adder Circuits in VHDL\/Yar\u0131m ve Tam Toplay\u0131c\u0131 Devreleri Half Adder in VHDL on FPGA\/FPGA-tabanl\u0131 Yar\u0131m Toplay\u0131c\u0131 Full Adder in VHDL on FPGA\/FPGA-tabanl\u0131 Tam Toplay\u0131c\u0131 &nbsp; Adder Circuits in VHDL\/Toplay\u0131c\u0131 Devreleri 4-bit Adder in VHDL on FPGA \/FPGA-tabanl\u0131 4-bit Toplay\u0131c\u0131 Adder_n-bit_generic in VHDL on FPGA &hellip; <\/p>\n<p><a class=\"more-link btn\" href=\"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/ders-notlari\/\">Devam\u0131n\u0131 oku<\/a><\/p>\n","protected":false},"author":3,"featured_media":0,"parent":0,"menu_order":4,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-10","page","type-page","status-publish","hentry","nodate","item-wrap"],"_links":{"self":[{"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/pages\/10","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/comments?post=10"}],"version-history":[{"count":0,"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/pages\/10\/revisions"}],"wp:attachment":[{"href":"https:\/\/blog.aku.edu.tr\/ismailkoyuncu\/wp-json\/wp\/v2\/media?parent=10"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}